Hardware description languages are like programming languages that help us design computer hardware with a higher level of abstraction than working with just gates and wires. We can describe the behaviour of a circuit in a formal language, and the CAD tool will synthesise (like a compiler) the HDL into gates and wires.
Three dominant HDLs are Verilog, SystemVerilog and VHDL. All are the IEEE-standard — occasionally proprietary hardware will come with their own HDLs, and the benefit of using the big three is that we can specify circuits that keep the same functionality even as the compilers and chips improve over time.
High-level synthesis (HLS) proposes an even greater level of abstraction, by using C/C++/SystemC/MATLAB to describe circuits instead of pure Verilog. This is an active topic of research.