Latches

SR latches (for set-reset) are a broad category of sequential circuit involving cross-coupled NOR gates. Gated latches introduce the addition of a control element, often called a clock.

SR latches form an easy introduction to other circuits with memory elements, like D-latches and flip-flops. In modern digital circuit design, SR latches are rarely used. #toimprove

Gated SR latch

Gated SR latches add a clock that can be used to disable and enable the effects of $S$ and $R$. If the clock is 0, then $R^{\prime }=S^{\prime }=0$ (the memory state).

It’s pretty typical to express gated RS latches only with NAND.

Simple case

Our simplest case are simple SR latches: Observe that for $S=1$, $R=1$, we get oscillations in $Q_a$ and $Q_b$, making this circuit difficult and inadvisable to use.

See also

• D-latch and flip-flops