A few different steps:

  • Instruction selection chooses assembly instructions to implement IR operations.
  • Register allocation maps virtual registers (maybe an infinite number) to a physical register (finite).
  • Instruction scheduling orders instructions to better leverage modern CPU architectures, like ordering to reduce pipeline stalls and increase instruction-level parallelism.
  • Machine-specific optimisations for the target architecture.
  • Assembly generation, which determines data layout and alignment, calling conventions, OS interfacing, etc.